A solid-state imaging device using an active MOS sensor is configured such that a signal detected by a photodiode is amplified at a transistor in each pixel, and the solid-state imaging device is characterized by its high sensitivity. A most serious problem for the solid-state imaging device is a reverse-direction leakage current at a pn junction of a silicon semiconductor. This leakage current, which cannot be isolated from a signal current generated by incident light, becomes a noise and degrades the performance of the solid-state imaging device. This leakage current is caused in part by stress applied to the silicon substrate.
FIG. 4 illustrates a silicon substrate 101 on which a gate insulating film 102 and a gate electrode 103 are formed. In this structure, a gate-edge region 104 extending from an edge of the gate electrode 103 to the periphery was applied with stress that causes leakage current in the vicinity of the surface of the silicon substrate 101. In fact, a crystal defect 105 caused by stress was observed inside this gate-edge region 104. Such a crystal defect was not found in the part under the gate electrode 103. In light of this, when designing a high-performance solid-state imaging device, the conventional emphasis has been to suppress a leakage current generated at the part of the gate-edge region 104. Since this gate-edge region 104 is also a via point for electric charge at a time of reading signal charge out from a photodiode formed at the left of the gate electrode 103 in FIG. 3, a condition for facilitating the charge readout and a condition for suppressing the leakage current will be traded off in the design.
With a recent trend toward fine processing of silicon semiconductors, it has been found that a leakage current can be caused even when stress is applied to a part other than the above-mentioned region. As shown in FIG. 5, it has been found that, when a gate insulating film 102a that is thinner than a conventional one is formed, a leakage current generated at an under-gate region 106 is bigger than that generated at a conventional gate-edge region 104. Among the leakage currents generated at the under-gate region 106, a leakage current that flows into the photodiode region 107 will cause a problem, while a leakage current 110 that flows into a drain region 109 will not become a noise and thus it does not cause a problem. Therefore, an object has been to suppress a leakage current 108 that flows into the photodiode region 107 from the area under the gate electrode 103, and at the same time, to design the trade-off for facilitating readout of signal charge from the photodiode.
Next, a structure of a cross section of a cell for a conventional solid-state imaging device will be described below by referring to FIG. 6. FIG. 6 is a cross-sectional view of a cell of a conventional solid-state imaging device (see, for example, JP 11 (1999)-274450). In FIG. 6, a P-well 2 is formed of a Si substrate 1, and a N-type photodiode region 3 for a photoelectric conversion is formed inside the P-well 2. One edge of the gate electrode 4 is positioned adjacent to the N-type photodiode region 3. The lower part of the gate electrode 4 has a MOS transistor structure, in which a gate oxide film 5 and a threshold controlling implantation region 6 for a transistor are formed. And a N-type drain region 7 is formed adjacent to the other edge of the gate electrode 4. Electrons that have been photoelectrically converted are stored in the N-type photodiode region 3, transferred to the N-type drain region 7, and detected as signals. On the upper surface of the N-type photodiode region 3, a high-concentration P-type diffusion layer 8 is formed adjacent to one edge of the gate electrode 4, and a high-concentration P-type diffusion layer 9 is formed adjacent to the P-type diffusion layer 8. The high-concentration P-type diffusion layer 9 is a surface-shield layer for shielding the upper surface of the photodiode, and it is formed to suppress influences of crystal defects and metal pollution on the interface state of the Si—SiO2 interface. Elements such as the photodiode and a plurality of MOS transistors are isolated from each other by an element-isolating portion 10.
In the above-mentioned conventional art, the concentration of the P-type diffusion layer 8 in the vicinity of the gate is set lower than the concentration of the P-type diffusion layer 9 forming the surface-shield layer, thereby improving the readout characteristic. However, when the concentration of the P-type diffusion layer 8 in the vicinity of the gate electrode 4 is reduced, the interface state of the Si—SiO2 interface and the active level in the Si substrate 1 cannot be inactivated sufficiently, which may cause problems such as image defects (e.g., white flaws and dark current).